The Case for Message Passing on Many-Core Chips

The many-core era is different. The nature of programmers, the nature of applications, and the nature of the computing substrate are different for multi-core chips than the traditional parallel machines that drove the parallel programming debate in the past. Specifically, while traditional parallel computers were programmed by highlyeducated scientists, multi-core chips will be programmed by mainstream programmers with little or no background in parallel algorithms, optimizing software for specific parallel hardware features, or the theoretical foundations of concurrency. Hence, multi-core programming models must place a premium on productivity and must make parallel programming accessible to the typical programmer. Similarly, while the history of parallel computing is dominated by highly specialized scientific applications, multicore processors will need to run the full range of general purpose applications. This implies a drastically increased diversity in the nature of applications and an expanded range of optimization goals. This will heavily impact the choice of the programming model for multi-core chips. The programming models for multi-core architectures should also be capable of adapting to and exploiting asymmetry (by design and accident) in processing cores. We argue that the above goals are often better served by a message passing programming model than a shared memory-based programming model.